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  1. Packs
  2. SAML11_DFP

SAML11_DFP

4.6.350
Microchip

  • Pack Type

    Device Support

Microchip SAML11 Series Device Support

Overview

The Microchip SAML11 Series Device Family Pack (DFP) is a CMSIS-Pack that:

Related packs

    - pack: ARM::CMSIS

Devices

ATSAML11D14A

Industry’s first and lowest power Arm® Cortex®-M23 featuring chip-level security and ARM® TrustZone® Technology, consuming less than 25uA/MHz in active mode and less than 100 nA in sleep mode. It features secure key storage, chip-level tamper resistance, crypto accelerators, secure boot, secure bootloader, enhanced peripheral touch controller, advanced analog, ISO7816 smart card interface, event system and SleepWalking peripherals. SAM L11 achieved EEMBC Certified ULPMark Core Profile score of 410 & Peripheral Profile score of 167SAML11 variants have the option to be securely key provisioned using Secure Thingz Secure Deploy™ Architecture.Supported by MPLAB X IDE and MPLAB Harmony.

Documentation:

Application Notes:

Additional Documents:

ATSAML11D15A

Industry’s first and lowest power Arm® Cortex®-M23 featuring chip-level security and ARM® TrustZone® Technology, consuming less than 25uA/MHz in active mode and less than 100 nA in sleep mode. It features secure key storage, chip-level tamper resistance, crypto accelerators, secure boot, secure bootloader, enhanced peripheral touch controller, advanced analog, ISO7816 smart card interface, event system and SleepWalking peripherals. SAM L11 achieved EEMBC Certified ULPMark Core Profile score of 410 & Peripheral Profile score of 167SAML11-KPH variants (Example part#: ATSAML11D15A-MUKPH) are pre-provisioned with Trustonic Root of Trust key and are supported by Kinibi-M Software Development Kit.SAML11 variants have the option to be securely key provisioned using Secure Thingz Secure Deploy™ Architecture.Supported by MPLAB X IDE and MPLAB Harmony.

Documentation:

Application Notes:

Additional Documents:

ATSAML11D16A

Industry’s first and lowest power Arm® Cortex®-M23 featuring chip-level security and ARM® TrustZone® Technology, consuming less than 25uA/MHz in active mode and less than 100 nA in sleep mode. It features secure key storage, chip-level tamper resistance, crypto accelerators, secure boot, secure bootloader, enhanced peripheral touch controller, advanced analog, ISO7816 smart card interface, event system and SleepWalking peripherals. SAM L11 achieved EEMBC Certified ULPMark Core Profile score of 410 & Peripheral Profile score of 167.SAML11-KPH variants (Example part#: ATSAML11D16A-MUKPH) are pre-provisioned with Trustonic Root of Trust key and are supported by Kinibi-M Software Development Kit.SAML11 variants have the option to be securely key provisioned using Secure Thingz Secure Deploy™ Architecture.Supported by MPLAB X IDE and MPLAB Harmony.

Documentation:

Application Notes:

Additional Documents:

ATSAML11E14A

Industry’s first and lowest power Arm® Cortex®-M23 featuring chip-level security and ARM® TrustZone® Technology, consuming less than 25uA/MHz in active mode and less than 100 nA in sleep mode. It features secure key storage, chip-level tamper resistance, crypto accelerators, secure boot, secure bootloader, enhanced peripheral touch controller, advanced analog, ISO7816 smart card interface, event system and SleepWalking peripherals. SAM L11 achieved EEMBC Certified ULPMark Core Profile score of 410 & Peripheral Profile score of 167SAML11 variants have the option to be securely key provisioned using Secure Thingz Secure Deploy™ Architecture.Supported by MPLAB X IDE and MPLAB Harmony.

Documentation:

Application Notes:

Additional Documents:

ATSAML11E15A

Industry’s first and lowest power Arm® Cortex®-M23 featuring chip-level security and ARM® TrustZone® Technology, consuming less than 25uA/MHz in active mode and less than 100 nA in sleep mode. It features secure key storage, chip-level tamper resistance, crypto accelerators, secure boot, secure bootloader, enhanced peripheral touch controller, advanced analog, ISO7816 smart card interface, event system and SleepWalking peripherals. SAM L11 achieved EEMBC Certified ULPMark Core Profile score of 410 & Peripheral Profile score of 167SAML11-KPH variants (Example part#: ATSAML11E15A-MUKPH) are pre-provisioned with Trustonic Root of Trust key and are supported by Kinibi-M Software Development Kit. SAML11 variants(Example part#: ATSAML11E15A-MU) have the option to be securely key provisioned using Secure Thingz Secure Deploy™ Architecture.Supported by MPLAB X IDE and MPLAB Harmony.

Documentation:

Application Notes:

Additional Documents:

ATSAML11E16A

Industry’s first and lowest power Arm® Cortex®-M23 featuring chip-level security and ARM® TrustZone® Technology, consuming less than 25uA/MHz in active mode and less than 100 nA in sleep mode. It features secure key storage, chip-level tamper resistance, crypto accelerators, secure boot, secure bootloader, enhanced peripheral touch controller, advanced analog, ISO7816 smart card interface, event system and SleepWalking peripherals. SAM L11 achieved EEMBC Certified ULPMark Core Profile score of 410 & Peripheral Profile score of 167SAML11-KPH variants (Example part#: ATSAML11E16A-MUKPH) are pre-provisioned with Trustonic Root of Trust key and are supported by Kinibi-M Software Development Kit. SAML11 variants(Example part#: ATSAML11E16A-MU) have the option to be securely key provisioned using Secure Thingz Secure Deploy™ Architecture.Supported by MPLAB X IDE and MPLAB Harmony.

Documentation:

Application Notes:

Additional Documents:

MISRA Compliance Deviations List

MISRA-C:2023

Deviation ID: MFWCG-40

  • Rule 5.5: Identifiers shall be distinct from macro names.
  • Use case: Identifiers corresponding to register names.

Example:

```C typedef union { struct { uint32_t GPIO:29; uint32_t :3; } vec; uint32_t reg; } ECIA_SRC8_Type;

#define GPIO (0x40081000) ```

  • Reason: Access to hardware.

The macros expand into the same identifiers, which allow users to detect for the presence of specific registers during preprocessing.

  • Scope: Device headers for the DEC15xx and MEC15xx family (<device-name>.h).

Deviation ID: MFWCG-42

  • Rule 20.9: All identifiers used in the controlling expression of #if or #elif preprocessing directives shall be #define'd before evaluation.
  • Use case: Use of compiler builtin macros.

Example:

C #ifdef (__ARM_FP == 14) || (__ARM_FP == 4) fpu_enable(); #endif

  • Reason: Access to hardware.

Headers may rely on builtin macros from the compiler and are written under the assumption that if the macro is not defined, its value is zero.

  • Scope: All device headers (<device-name>.h).

Deviation ID: MFWCG-43

  • Rule 21.1: #define and #undef shall not be used on a reserved identifier or reserved macro name.
  • Use case: Reserved names, beginning with _ followed by a capital letter or __ followed by a lower-case are within the compiler's namespace.

Example:

C #define __IO volatile

  • Reason: Access to hardware; Code Quality (Usability: Accessibility).

Within these headers originate many reserved names that are within the compiler's namespace.

  • Scope: All device headers (<device-name>.h).

Deviation ID: MFWCG-44

  • Rule 21.2: A reserved identifier or reserved macro name shall not be declared.
  • Use case: Reserved names, beginning with _ followed by a capital letter or __ followed by a lower-case are within the compiler's namespace.

Example:

C extern const VECTOR_TABLE_Type __VECTOR_TABLE;

  • Reason: Access to hardware; Code Quality (Usability: Accessibility).

Within these headers originate many reserved names that are within the compiler's namespace.

  • Scope: All device headers (<device-name>.h).

MISRA-C:2025

Deviation ID: MFWCG-44

  • Rule 5.10: A reserved identifier or reserved macro name shall not be declared.
  • Use case: Reserved names, beginning with _ followed by a capital letter or __ followed by a lower-case are within the compiler's namespace.

Example:

C extern const VECTOR_TABLE_Type __VECTOR_TABLE;

  • Reason: Access to hardware; Code Quality (Usability: Accessibility).

Within these headers originate many reserved names that are within the compiler's namespace.

  • Scope: All device headers (<device-name>.h).

Deviation ID: None

  • Rule 11.4: A conversion shall not be performed between a pointer to object and an arithmetic type.
  • Use case: Setting special registers from linker-generated symbols.

Example:

C pSrc = (uint32_t *) & __svectors; SCB->VTOR = ((uint32_t) pSrc & SCB_VTOR_TBLOFF_Msk);

  • Reason: Access to hardware.

Some hardware registers do not have a pointer type but hold an address.

  • Scope: Device startup code (startup_<name>.c)

Deviation ID: MFWCG-42

  • Rule 20.9: All identifiers used in the controlling expression of #if or #elif preprocessing directives shall be #define'd before evaluation.
  • Use case: Use of compiler builtin macros.

Example:

C #ifdef (__ARM_FP == 14) || (__ARM_FP == 4) fpu_enable(); #endif

  • Reason: Access to hardware.

Headers may rely on builtin macros from the compiler and are written under the assumption that if the macro is not defined, its value is zero.

  • Scope: All device headers (<device-name>.h).

Deviation ID: MFWCG-43

  • Rule 20.15: #define and #undef shall not be used on a reserved identifier or reserved macro name.
  • Use case: Reserved names, beginning with _ followed by a capital letter or __ followed by a lower-case are within the compiler's namespace.

Example:

C #define __IO volatile

  • Reason: Access to hardware; Code Quality (Usability: Accessibility).

Within these headers originate many reserved names that are within the compiler's namespace.

  • Scope: All device headers (<device-name>.h).

Support

For support questions, contact Microchip Support through https://www.microchip.com/en-us/support.