Cortex-M0+, 60 MHz
The HOLTEK HT50F3200S device is high performance, low power consumption 32-bit microcontrollers based around an Arm Cortex-M0+ processor core. The Cortex-M0+ is a next-generation processor core which is tightly coupled with Nested Vectored Interrupt Controller (NVIC), SysTick timer, and including advanced debug support.
The devices operate at a frequency of up to 60 MHz with a Flash accelerator to obtain maximum efficiency. It provides up to 64 KB of embedded Flash memory for code/data storage and up to 8 KB of embedded SRAM memory for system operation and application program usage. A variety of peripherals, such as ADC, I2C, USART, UART, SPI, GPTM, MCTM, SCI, CRC-16/32, RTC, WDT, PDMA, CMP, OPA, SW-DP (Serial Wire Debug Port), etc., are also implemented in the device series. Several power saving modes provide the flexibility for maximum optimization between wakeup latency and power consumption.
The HT50F3200S combined with OPA, CMP, DAC and MCTM's brake functions used to OCP protection. In order to implement the FOC algorithm, the MCTM can be used trigger ADC to read OPA output at the same time for detecting real-time phase current information. The above features ensure that the devices are suitable for use in a FOC algorithm for PMSM motor applications.
IRAM1 8 KiB IROM1 63 KiB