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  1. Devices
  2. ARM Cortex M33 (MPS3)
  3. SSE-200-MPS3

SSE-200-MPS3

Arm

SSE-200 for MPS3 (TrustZone enabled subsystem).

This version only supports one Cortex-M33, core 0, from the 2 cores in the system.

The flag __DOMAIN_NS is used in the internal files to distinguish between secure and non-secure application. Please, use the flag as follow:
-> secure application uses -D__DOMAIN_NS=0
-> non-secure application uses -D__DOMAIN_NS=1

Core

Processor

Cortex-M33
Maximum Clock Frequency 50 MHz
Memory Protection Unit MPU
Floating Point Unit NO_FPU
Trust Zone TZ
Digital Signal Processor NO_DSP
CortexM Vector Extensions
Endian Configurable
Features View features

Processor

Cortex-M33, 50 MHz

  • I/O
    IO Pins 60 IO Pins
  • Communication
    Universal Synchronous Asynchronous Receiver Transmitter 6 x 0 bit/s Universal Synchronous Asynchronous Receiver Transmitter
    Serial Peripheral Interface 3 x 0 bit/s Serial Peripheral Interface
    Inter-Integrated Circuit 4 x Inter-Integrated Circuit