MIMXRT1170-EVK
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Cores
Cortex-M7
Cortex-M4
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Device
MIMXRT1176DVMAA -
CMSIS Pack
MIMXRT1170-EVK_BSP
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bubble_peripheral_cm7
Keil Studio AC6, GCC, IARThe bubble level demo demonstrates basic usage of the on-board accelerometer to implement a bubble level. A bubble level utilizes two axes to visually show deviation from a level plane (0 degrees) on a given axis. You can open the mex file with MCUXpresso Config Tool to do further configuration of pin, clock and peripheral.
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caam_cm4
Keil Studio, µVision AC6The CAAM Example project is a demonstration program that uses the KSDK software to encrypt plain textand decrypt it back using AES algorithm. CBC and GCM modes are demonstrated.The symmetric key is generated at random, using CAAM's random number generator.
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caam_cm4
Keil Studio AC6, GCC, IARThe CAAM Example project is a demonstration program that uses the KSDK software to encrypt plain textand decrypt it back using AES algorithm. CBC and GCM modes are demonstrated.The symmetric key is generated at random, using CAAM's random number generator.
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caam_cm7
Keil Studio, µVision AC6The CAAM Example project is a demonstration program that uses the KSDK software to encrypt plain textand decrypt it back using AES algorithm. CBC and GCM modes are demonstrated.The symmetric key is generated at random, using CAAM's random number generator.
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caam_cm7
Keil Studio AC6, GCC, IARThe CAAM Example project is a demonstration program that uses the KSDK software to encrypt plain textand decrypt it back using AES algorithm. CBC and GCM modes are demonstrated.The symmetric key is generated at random, using CAAM's random number generator.
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cache_cm4
Keil Studio AC6, GCC, IARThe cache example shows how to use memory cache driver.In this example, many memory (such as SDRAM, etc) and DMA will be used to show the example.Those memory is both accessible for cpu and DMA. For the memory data alignment, cache driver should be used rightly. For cache enabled case, the cache invalidate operation should be done before cpu access the memory. The cache clean opeartion should be done after CPU verify the memorymemory and before DMA access the memory.
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cache_cm4
Keil Studio, µVision AC6The cache example shows how to use memory cache driver.In this example, many memory (such as SDRAM, etc) and DMA will be used to show the example.Those memory is both accessible for cpu and DMA. For the memory data alignment, cache driver should be used rightly. For cache enabled case, the cache invalidate operation should be done before cpu access the memory. The cache clean opeartion should be done after CPU verify the memorymemory and before DMA access the memory.
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cache_cm7
Keil Studio, µVision AC6The cache example shows how to use memory cache driver.In this example, many memory (such as SDRAM, etc) and DMA will be used to show the example.Those memory is both accessible for cpu and DMA. For the memory data alignment, cache driver should be used rightly. For cache enabled case, the cache invalidate operation should be done before cpu access the memory. The cache clean opeartion should be done after CPU verify the memorymemory and before DMA access the memory.
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cache_cm7
Keil Studio AC6, GCC, IARThe cache example shows how to use memory cache driver.In this example, many memory (such as SDRAM, etc) and DMA will be used to show the example.Those memory is both accessible for cpu and DMA. For the memory data alignment, cache driver should be used rightly. For cache enabled case, the cache invalidate operation should be done before cpu access the memory. The cache clean opeartion should be done after CPU verify the memorymemory and before DMA access the memory.
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canfd_interrupt_transfer_cm4
Keil Studio, µVision AC6The canfd_interrupt example shows how to use FlexCAN driver in none-blocking interrupt way:In this example, 2 boards are connected through CAN bus. Endpoint A(board A) send a CAN Message toEndpoint B(board B) when user press space key in terminal. Endpoint B receive the message, printthe message content to terminal and echo back the message. Endpoint A will increase the receivedmessage and waiting for the next transmission of the user initiated.
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